/* * Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include #include #include #include #if ENABLE_EMI_MPU_SW_LOCK static unsigned char region_lock_state[EMI_MPU_REGION_NUM]; #endif #define EMI_MPU_START_MASK (0x00FFFFFF) #define EMI_MPU_END_MASK (0x00FFFFFF) #define EMI_MPU_APC_SW_LOCK_MASK (0x00FFFFFF) #define EMI_MPU_APC_HW_LOCK_MASK (0x80FFFFFF) static int _emi_mpu_set_protection(unsigned int start, unsigned int end, unsigned int apc) { unsigned int dgroup; unsigned int region; region = (start >> 24) & 0xFF; start &= EMI_MPU_START_MASK; dgroup = (end >> 24) & 0xFF; end &= EMI_MPU_END_MASK; if ((region >= EMI_MPU_REGION_NUM) || (dgroup > EMI_MPU_DGROUP_NUM)) { WARN("invalid region, domain\n"); return -1; } #if ENABLE_EMI_MPU_SW_LOCK if (region_lock_state[region] == 1) { WARN("invalid region\n"); return -1; } if ((dgroup == 0U) && ((apc >> 31) & 0x1)) { region_lock_state[region] = 1; } apc &= EMI_MPU_APC_SW_LOCK_MASK; #else apc &= EMI_MPU_APC_HW_LOCK_MASK; #endif if ((start >= DRAM_OFFSET) && (end >= start)) { start -= DRAM_OFFSET; end -= DRAM_OFFSET; } else { WARN("invalid range\n"); return -1; } mmio_write_32(EMI_MPU_SA(region), start); mmio_write_32(EMI_MPU_EA(region), end); mmio_write_32(EMI_MPU_APC(region, dgroup), apc); #if defined(SUB_EMI_MPU_BASE) mmio_write_32(SUB_EMI_MPU_SA(region), start); mmio_write_32(SUB_EMI_MPU_EA(region), end); mmio_write_32(SUB_EMI_MPU_APC(region, dgroup), apc); #endif return 0; } int emi_mpu_set_protection(struct emi_region_info_t *region_info) { unsigned int start, end; int i; if (region_info->region >= EMI_MPU_REGION_NUM) { WARN("invalid region\n"); return -1; } start = (unsigned int)(region_info->start >> EMI_MPU_ALIGN_BITS) | (region_info->region << 24); for (i = EMI_MPU_DGROUP_NUM - 1; i >= 0; i--) { end = (unsigned int)(region_info->end >> EMI_MPU_ALIGN_BITS) | (i << 24); if (_emi_mpu_set_protection(start, end, region_info->apc[i]) < 0) { WARN("failed to set emi mpu protection(%d, %d, %d)\n", start, end, region_info->apc[i]); } } return 0; } void emi_mpu_init(void) { struct emi_region_info_t region_info; /* SCP DRAM */ region_info.start = 0x50000000ULL; region_info.end = 0x5109FFFFULL; region_info.region = 2; SET_ACCESS_PERMISSION(region_info.apc, 1, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN, NO_PROTECTION); emi_mpu_set_protection(®ion_info); /* DSP protect address */ region_info.start = 0x60000000ULL; /* dram base addr */ region_info.end = 0x610FFFFFULL; region_info.region = 3; SET_ACCESS_PERMISSION(region_info.apc, 1, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, NO_PROTECTION, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, NO_PROTECTION); emi_mpu_set_protection(®ion_info); /* Forbidden All */ region_info.start = 0x40000000ULL; /* dram base addr */ region_info.end = 0x1FFFF0000ULL; region_info.region = 4; SET_ACCESS_PERMISSION(region_info.apc, 1, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, FORBIDDEN, NO_PROTECTION); emi_mpu_set_protection(®ion_info); }