diff options
Diffstat (limited to 'include/common')
| -rw-r--r-- | include/common/asm_macros.S | 165 | ||||
| -rw-r--r-- | include/common/bl_common.h | 211 | ||||
| -rw-r--r-- | include/common/debug.h | 74 | ||||
| -rw-r--r-- | include/common/fip.h | 141 | ||||
| -rw-r--r-- | include/common/firmware_image_package.h | 66 | ||||
| -rw-r--r-- | include/common/memtest.h | 41 |
6 files changed, 698 insertions, 0 deletions
diff --git a/include/common/asm_macros.S b/include/common/asm_macros.S new file mode 100644 index 0000000..ce60fdf --- /dev/null +++ b/include/common/asm_macros.S @@ -0,0 +1,165 @@ +/* + * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include <arch.h> + + + .macro func_prologue + stp x29, x30, [sp, #-0x10]! + mov x29,sp + .endm + + .macro func_epilogue + ldp x29, x30, [sp], #0x10 + .endm + + + .macro dcache_line_size reg, tmp + mrs \tmp, ctr_el0 + ubfx \tmp, \tmp, #16, #4 + mov \reg, #4 + lsl \reg, \reg, \tmp + .endm + + + .macro icache_line_size reg, tmp + mrs \tmp, ctr_el0 + and \tmp, \tmp, #0xf + mov \reg, #4 + lsl \reg, \reg, \tmp + .endm + + + .macro smc_check label + mrs x0, esr_el3 + ubfx x0, x0, #ESR_EC_SHIFT, #ESR_EC_LENGTH + cmp x0, #EC_AARCH64_SMC + b.ne $label + .endm + + + /* + * This macro verifies that the a given vector doesn't exceed the + * architectural limit of 32 instructions. This is meant to be placed + * immedately after the last instruction in the vector. It takes the + * vector entry as the parameter + */ + .macro check_vector_size since + .if (. - \since) > (32 * 4) + .error "Vector exceeds 32 instructions" + .endif + .endm + + /* + * This macro is used to create a function label and place the + * code into a separate text section based on the function name + * to enable elimination of unused code during linking + */ + .macro func _name + .section .text.\_name, "ax" + .type \_name, %function + \_name: + .endm + + /* --------------------------------------------- + * Find the type of reset and jump to handler + * if present. If the handler is null then it is + * a cold boot. The primary cpu will set up the + * platform while the secondaries wait for + * their turn to be woken up + * --------------------------------------------- + */ + .macro wait_for_entrypoint +wait_for_entrypoint: + mrs x0, mpidr_el1 + bl platform_get_entrypoint + cbnz x0, do_warm_boot + mrs x0, mpidr_el1 + bl platform_is_primary_cpu + cbnz x0, do_cold_boot + + /* --------------------------------------------- + * Perform any platform specific secondary cpu + * actions + * --------------------------------------------- + */ + bl plat_secondary_cold_boot_setup + b wait_for_entrypoint + + do_warm_boot: + /* --------------------------------------------- + * Jump to BL31 for all warm boot init. + * --------------------------------------------- + */ + blr x0 + + do_cold_boot: + .endm + + /* + * This macro declares an array of 1 or more stacks, properly + * aligned and in the requested section + */ +#define STACK_ALIGN 6 + + .macro declare_stack _name, _section, _size, _count + .if ((\_size & ((1 << STACK_ALIGN) - 1)) <> 0) + .error "Stack size not correctly aligned" + .endif + .section \_section, "aw", %nobits + .align STACK_ALIGN + .global \_name + \_name: + .space ((\_count) * (\_size)), 0 + .endm + + /* + * This macro calculates the base address of an MP stack using the + * platform_get_core_pos() index, the name of the stack storage and + * the size of each stack + * In: X0 = MPIDR of CPU whose stack is wanted + * Out: X0 = physical address of stack base + * Clobber: X30, X1, X2 + */ + .macro get_mp_stack _name, _size + bl platform_get_core_pos + ldr x2, =(\_name + \_size) + mov x1, #\_size + madd x0, x0, x1, x2 + .endm + + /* + * This macro calculates the base address of a UP stack using the + * name of the stack storage and the size of the stack + * Out: X0 = physical address of stack base + */ + .macro get_up_stack _name, _size + ldr x0, =(\_name + \_size) + .endm diff --git a/include/common/bl_common.h b/include/common/bl_common.h new file mode 100644 index 0000000..1875284 --- /dev/null +++ b/include/common/bl_common.h @@ -0,0 +1,211 @@ +/* + * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __BL_COMMON_H__ +#define __BL_COMMON_H__ + + + +#define SECURE 0x0 +#define NON_SECURE 0x1 +#define PARAM_EP_SECURITY_MASK 0x1 + +#define UP 1 +#define DOWN 0 + +/******************************************************************************* + * Constants for loading images. When BLx wants to load BLy, it looks at a + * meminfo structure to find the extents of free memory. Then depending upon + * how it has been configured, it can either load BLy at the top or bottom of + * the free memory. These constants indicate the choice. + * TODO: Make this configurable while building the trusted firmware. + ******************************************************************************/ +#define TOP_LOAD 0x1 +#define BOT_LOAD !TOP_LOAD +#define LOAD_MASK (1 << 0) + +/****************************************************************************** + * Opcode passed in x0 to tell next EL that we want to run an image. + * Corresponds to the function ID of the only SMC that the BL1 exception + * handlers service. That's why the chosen value is the first function ID of + * the ARM SMC64 range. + *****************************************************************************/ +#define RUN_IMAGE 0xC0000000 + +/******************************************************************************* + * Constants that allow assembler code to access members of and the + * 'entry_point_info' structure at their correct offsets. + ******************************************************************************/ +#define ENTRY_POINT_INFO_PC_OFFSET 0x08 +#define ENTRY_POINT_INFO_ARGS_OFFSET 0x18 + +#define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK) +#define SET_SECURITY_STATE(x, security) \ + ((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security)) + +#define PARAM_EP 0x01 +#define PARAM_IMAGE_BINARY 0x02 +#define PARAM_BL31 0x03 + +#define VERSION_1 0x01 + +#define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \ + (_p)->h.type = (uint8_t)(_type); \ + (_p)->h.version = (uint8_t)(_ver); \ + (_p)->h.size = (uint16_t)sizeof(*_p); \ + (_p)->h.attr = (uint32_t)(_attr) ; \ + } while (0) + +#ifndef __ASSEMBLY__ +#include <cdefs.h> /* For __dead2 */ +#include <cassert.h> +#include <stdint.h> + +/******************************************************************************* + * Structure used for telling the next BL how much of a particular type of + * memory is available for its use and how much is already used. + ******************************************************************************/ +typedef struct meminfo { + unsigned long total_base; + long total_size; + unsigned long free_base; + long free_size; + unsigned long attr; + unsigned long next; +} meminfo_t; + +typedef struct aapcs64_params { + unsigned long arg0; + unsigned long arg1; + unsigned long arg2; + unsigned long arg3; + unsigned long arg4; + unsigned long arg5; + unsigned long arg6; + unsigned long arg7; +} aapcs64_params_t; + +/*************************************************************************** + * This structure provides version information and the size of the + * structure, attributes for the structure it represents + ***************************************************************************/ +typedef struct param_header { + uint8_t type; /* type of the structure */ + uint8_t version; /* version of this structure */ + uint16_t size; /* size of this structure in bytes */ + uint32_t attr; /* attributes: unused bits SBZ */ +} param_header_t; + +/***************************************************************************** + * This structure represents the superset of information needed while + * switching exception levels. The only two mechanisms to do so are + * ERET & SMC. Security state is indicated using bit zero of header + * attribute + * NOTE: BL1 expects entrypoint followed by spsr while processing + * SMC to jump to BL31 from the start of entry_point_info + *****************************************************************************/ +typedef struct entry_point_info { + param_header_t h; + uintptr_t pc; + uint32_t spsr; + aapcs64_params_t args; +} entry_point_info_t; + +/***************************************************************************** + * Image info binary provides information from the image loader that + * can be used by the firmware to manage available trusted RAM. + * More advanced firmware image formats can provide additional + * information that enables optimization or greater flexibility in the + * common firmware code + *****************************************************************************/ +typedef struct image_info { + param_header_t h; + uintptr_t image_base; /* physical address of base of image */ + uint32_t image_size; /* bytes read from image file */ +} image_info_t; + +/******************************************************************************* + * This structure represents the superset of information that can be passed to + * BL31 e.g. while passing control to it from BL2. The BL32 parameters will be + * populated only if BL2 detects its presence. A pointer to a structure of this + * type should be passed in X3 to BL31's cold boot entrypoint + * + * Use of this structure and the X3 parameter is not mandatory: the BL3-1 + * platform code can use other mechanisms to provide the necessary information + * about BL3-2 and BL3-3 to the common and SPD code. + * + * BL3-1 image information is mandatory if this structure is used. If either of + * the optional BL3-2 and BL3-3 image information is not provided, this is + * indicated by the respective image_info pointers being zero. + ******************************************************************************/ +typedef struct bl31_params { + param_header_t h; + image_info_t *bl31_image_info; + entry_point_info_t *bl32_ep_info; + image_info_t *bl32_image_info; + entry_point_info_t *bl33_ep_info; + image_info_t *bl33_image_info; +} bl31_params_t; + +/* + * Compile time assertions related to the 'entry_point_info' structure to + * ensure that the assembler and the compiler view of the offsets of + * the structure members is the same. + */ +CASSERT(ENTRY_POINT_INFO_PC_OFFSET == + __builtin_offsetof(entry_point_info_t, pc), \ + assert_BL31_pc_offset_mismatch); + +CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \ + __builtin_offsetof(entry_point_info_t, args), \ + assert_BL31_args_offset_mismatch); + +CASSERT(sizeof(unsigned long) == + __builtin_offsetof(entry_point_info_t, spsr) - \ + __builtin_offsetof(entry_point_info_t, pc), \ + assert_entrypoint_and_spsr_should_be_adjacent); + +/******************************************************************************* + * Function & variable prototypes + ******************************************************************************/ +unsigned long page_align(unsigned long, unsigned); +void change_security_state(unsigned int); +unsigned long image_size(const char *); +int load_image(meminfo_t *, + const char *, + unsigned int, + unsigned long, + image_info_t *, + entry_point_info_t *); +extern const char build_message[]; + +#endif /*__ASSEMBLY__*/ + +#endif /* __BL_COMMON_H__ */ diff --git a/include/common/debug.h b/include/common/debug.h new file mode 100644 index 0000000..8abb0b8 --- /dev/null +++ b/include/common/debug.h @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __DEBUG_H__ +#define __DEBUG_H__ + +#include <stdio.h> + +/* If building the project with DEBUG disabled the INFO and WARN macros + * won't produce any output. The ERROR macro is always enabled. + * The format expected is the same as for printf(). + * INFO("Info %s.\n", "message") -> INFO: Info message. + * WARN("Warning %s.\n", "message") -> WARN: Warning message. + * ERROR("Error %s.\n", "message") -> ERROR: Error message. + * + * TODO : add debug levels. + */ +#if DEBUG + //#define INFO(...) printf("INFO: " __VA_ARGS__) + //#define WARN(...) printf("WARN: " __VA_ARGS__) + #define INFO(...) + #define WARN(...) +#else + #define INFO(...) + #define WARN(...) +#endif + +//#define ERROR(...) printf("ERROR: " __VA_ARGS__) +#define ERROR(...) + + +/* For the moment this Panic function is very basic, Report an error and + * spin. This can be expanded in the future to provide more information. + */ +#if DEBUG +void __dead2 do_panic(const char *file, int line); +#define panic() do_panic(__FILE__, __LINE__) + +#else +void __dead2 do_panic(void); +#define panic() do_panic() + +#endif + +void print_string_value(char *s, unsigned long *mem); + +#endif /* __DEBUG_H__ */ diff --git a/include/common/fip.h b/include/common/fip.h new file mode 100644 index 0000000..19146e2 --- /dev/null +++ b/include/common/fip.h @@ -0,0 +1,141 @@ + +/* + * arch/arm/cpu/armv8/common/firmware/include/common/fip.h + * + * Copyright (C) 2015 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. +*/ + +#include <bl_common.h> +#include <stdint.h> +#include <platform_def.h> +#include <storage.h> +#include <config.h> + +#ifndef __BL2_FIP_H_ +#define __BL2_FIP_H_ + +#define NEED_BL32 CONFIG_NEED_BL32 +#define NEED_BL301 CONFIG_NEED_BL301 + +#define TOC_HEADER_NAME (0xAA640001) +#define TOC_HEADER_SERIAL_NUMBER (0x12345678) + +#define _UUID_NODE_LEN 6 + +struct uuid { + uint32_t time_low; + uint16_t time_mid; + uint16_t time_hi_and_version; + uint8_t clock_seq_hi_and_reserved; + uint8_t clock_seq_low; + uint8_t node[_UUID_NODE_LEN]; +}; + +typedef struct uuid uuid_t; + +typedef struct fip_toc_header { + uint32_t name; + uint32_t serial_number; + uint64_t flags; +} fip_toc_header_t; + +typedef struct fip_toc_entry { + uuid_t uuid; + uint64_t offset; + uint64_t size; + uint64_t flags; +} fip_toc_entry_t; + +/*amlogic fip structure: bl30+bl31+(bl32)+bl33*/ +typedef struct aml_fip_header { + fip_toc_header_t fip_header; /*16byte*/ + fip_toc_entry_t bl30_entry; /*40byte*/ +#if (NEED_BL301) + fip_toc_entry_t bl301_entry; /*40byte*/ +#endif + fip_toc_entry_t bl31_entry; /*40byte*/ +#if (NEED_BL32) + fip_toc_entry_t bl32_entry; /*40byte*/ +#endif + fip_toc_entry_t bl33_entry; /*40byte*/ +} aml_fip_header_t; + +/*aml defines*/ +#define FIP_HEADER_SIZE_OFFSET 0x20 +#define TPL_LOAD_ADDR CONFIG_SYS_TEXT_BASE +#define TPL_GET_BL_ADDR(offset) (TPL_LOAD_ADDR + (*((volatile unsigned *)(TPL_LOAD_ADDR + (offset))))) +#define TPL_GET_BL_SIZE(offset) (*((volatile unsigned *)(TPL_LOAD_ADDR + offset))) + +/*aml fip.bin doesn't have bl2.bin*/ +//#define FM_BIN_BL2_OFFSET 0x20 +//#define FM_BIN_BL2_SIZE 0x28 +#define FM_BIN_BL30_OFFSET 0x20 //0x48(when have bl2.bin) +#define FM_BIN_BL30_SIZE 0x28 //0x50 +#define FM_BIN_BL31_OFFSET 0x48 //0x70 +#define FM_BIN_BL31_SIZE 0x50 //0x78 +#if (NEED_BL32) +#define FM_BIN_BL32_OFFSET 0x70 //0x98 +#define FM_BIN_BL32_SIZE 0x78 //0xA0 +#define FM_BIN_BL33_OFFSET 0x98 //0xC0 +#define FM_BIN_BL33_SIZE 0xA0 //0xC8 +#else +#define FM_BIN_BL33_OFFSET 0x70 //0x98 +#define FM_BIN_BL33_SIZE 0x78 //0xA0 +#endif + +/* load address assignment */ +#define FM_BL30_LOAD_ADDR CONFIG_SYS_TEXT_BASE +#define FM_BL301_LOAD_ADDR CONFIG_SYS_TEXT_BASE +#define FM_BL31_LOAD_ADDR 0x10100000 //0x05000000 +#define FM_BL32_LOAD_ADDR 0x05200000 +#define FM_BL33_LOAD_ADDR CONFIG_SYS_TEXT_BASE + +/*usb burning func*/ +#define USB_BL2_RETURN_ROM_ADDR 0xd9044504 +#define FM_USB_MODE_LOAD_ADDR 0x0200c000//using u-boot.bin.usb.tpl, not u-boot.bin +#define BL2_RETURN_ROM_USB_ADDR 0xd9043df0 +#define USB_BL2_RUN_CMD_PARA_ADDR (void*)(0XD9000000 + 0XC000)//(BL1_RAM_END)//sram_start + 48K + +#define FM_FIP_HEADER_LOAD_ADDR 0x01400000 /*tmp addr until bl33 load done*/ +#define BL2_MMU_TABLE_BASE 0x01500000 +#define BL2_MMU_TABLE_SIZE (sizeof(uint64_t) * MAX_XLAT_TABLES * XLAT_TABLE_ENTRIES) +#define BL2_MMAP_BASE 0x01600000 +#define BL2_MMAP_NUM (MAX_MMAP_REGIONS + 1) +#define BL2_SEC_BOOT_BUF_BASE 0x01700000 +#define BL2_SEC_BOOT_BUF_SIZE 0x00100000 +#define BL2_NAND_BUF_BASE 0x01800000 +#define BL2_NAND_BUF_SIZE 0x00100000 +#define BL2_SEC_BOOT_SP_BASE (BL2_NAND_BUF_BASE) +#define FM_FIP_BL3X_TEMP_LOAD_ADDR (BL2_SEC_BOOT_BUF_BASE) /*tmp addr for bl3x load & process for secure boot*/ + +/*fip defines*/ +void bl2_load_image(void); + +/*parse blx*/ +void parse_blx(image_info_t *image_data, + entry_point_info_t *entry_point_info, + unsigned int src, + unsigned int dst, + unsigned int length, + unsigned int); +void process_bl30x(image_info_t *image_data, + entry_point_info_t *entry_point_info, + const char * name); +void bl2_to_romcode(uintptr_t entry); +void check_handler(void); + +#endif /*__BL2_FIP_H_*/ diff --git a/include/common/firmware_image_package.h b/include/common/firmware_image_package.h new file mode 100644 index 0000000..f4554ec --- /dev/null +++ b/include/common/firmware_image_package.h @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __FIRMWARE_IMAGE_PACKAGE_H__ +#define __FIRMWARE_IMAGE_PACKAGE_H__ + +#include <stdint.h> +#include <uuid.h> + +/* This is used as a signature to validate the blob header */ +#define TOC_HEADER_NAME 0xAA640001 + + +/* ToC Entry UUIDs */ +#define UUID_TRUSTED_BOOT_FIRMWARE_BL2 \ + {0x0becf95f, 0x224d, 0x4d3e, 0xa5, 0x44, {0xc3, 0x9d, 0x81, 0xc7, 0x3f, 0x0a} } +#define UUID_SCP_FIRMWARE_BL30 \ + {0x3dfd6697, 0xbe89, 0x49e8, 0xae, 0x5d, {0x78, 0xa1, 0x40, 0x60, 0x82, 0x13} } +#define UUID_EL3_RUNTIME_FIRMWARE_BL31 \ + {0x6d08d447, 0xfe4c, 0x4698, 0x9b, 0x95, {0x29, 0x50, 0xcb, 0xbd, 0x5a, 0x00} } +#define UUID_SECURE_PAYLOAD_BL32 \ + {0x89e1d005, 0xdc53, 0x4713, 0x8d, 0x2b, {0x50, 0x0a, 0x4b, 0x7a, 0x3e, 0x38} } +#define UUID_NON_TRUSTED_FIRMWARE_BL33 \ + {0xa7eed0d6, 0xeafc, 0x4bd5, 0x97, 0x82, {0x99, 0x34, 0xf2, 0x34, 0xb6, 0xe4} } + +typedef struct fip_toc_header { + uint32_t name; + uint32_t serial_number; + uint64_t flags; +} fip_toc_header_t; + +typedef struct fip_toc_entry { + uuid_t uuid; + uint64_t offset_address; + uint64_t size; + uint64_t flags; +} fip_toc_entry_t; + +#endif /* __FIRMWARE_IMAGE_PACKAGE_H__ */ diff --git a/include/common/memtest.h b/include/common/memtest.h new file mode 100644 index 0000000..df05d9b --- /dev/null +++ b/include/common/memtest.h @@ -0,0 +1,41 @@ +/********************************************************************** + * + * Filename: memtest.h + * + * Description: Memory-testing module API. + * + * Notes: The memory tests can be easily ported to systems with + * different data bus widths by redefining 'unsigned int' type. + * + * + * Copyright (c) 2000 by Michael Barr. This software is placed into + * the public domain and may be used for any purpose. However, this + * notice must not be changed or removed and no warranty is either + * expressed or implied by its publication or distribution. + **********************************************************************/ + +#ifndef _memtest_h +#define _memtest_h + + +/* + * Define NULL pointer value. + */ +#ifndef NULL +#define NULL (void *) 0 +#endif + +/* + * Set the data bus width. + */ +//typedef unsigned int unsigned int; + +/* + * Function prototypes. + */ + +unsigned int memTestDataBus(volatile unsigned int * address); +unsigned int memTestAddressBus(volatile unsigned int * baseAddress, unsigned int nBytes); +unsigned int memTestDevice(volatile unsigned int * baseAddress, unsigned int nBytes); + +#endif /* _memtest_h */
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