1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
|
/*
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch_helpers.h>
#include <assert.h>
#include <bl_common.h>
#include <mmio.h>
#include <platform.h>
#include <platform_def.h>
#include <xlat_tables.h>
#include "../plat_def.h"
#include <runtime_svc.h>
#include <arch_helpers.h>
#include <asm/arch/watchdog.h>
#include <stdio.h>
extern int console_puts(const char *s);
extern void console_put_hex(unsigned long data,unsigned int bitlen);
#ifdef BL2_ENABLE_MMU
/*
* Table of regions to map using the MMU.
* This doesn't include Trusted RAM as the 'mem_layout' argument passed to
* configure_mmu_elx() will give the available subset of that,
*/
static const mmap_region_t plat_mmap[] = {
{ MAILBOX_START, MAILBOX_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
{ TZROM_BASE, TZROM_SIZE, MT_MEMORY | MT_RO | MT_SECURE },
{ DRAM_BASE, DRAM_SIZE, MT_MEMORY | MT_RW | MT_NS },
{ SPI_BASE, SPI_SIZE, MT_MEMORY | MT_RW | MT_SECURE },
{ DEVICEC_BASE, DEVICEC_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
{ DEVICED_BASE, DEVICED_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
{ DEVICEE_BASE, DEVICEE_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
{0}
};
/*******************************************************************************
* Macro generating the code for the function setting up the pagetables as per
* the platform memory map & initialize the mmu, for the given exception level
******************************************************************************/
#define DEFINE_CONFIGURE_MMU_EL(_el) \
void configure_mmu_el##_el(unsigned long total_base, \
unsigned long total_size, \
unsigned long ro_start, \
unsigned long ro_limit, \
unsigned long coh_start, \
unsigned long coh_limit) \
{ \
mmap_add_region(total_base, \
total_size, \
MT_MEMORY | MT_RW | MT_SECURE); \
mmap_add_region(ro_start, ro_limit - ro_start, \
MT_MEMORY | MT_RO | MT_SECURE); \
mmap_add_region(coh_start, coh_limit - coh_start,\
MT_DEVICE | MT_RW | MT_SECURE); \
mmap_add(plat_mmap); \
init_xlat_tables(); \
\
enable_mmu_el##_el(); \
}
/* Define EL1 and EL3 variants of the function initialising the MMU */
DEFINE_CONFIGURE_MMU_EL(1)
DEFINE_CONFIGURE_MMU_EL(3)
#endif
unsigned long plat_get_ns_image_entrypoint(void)
{
return NS_IMAGE_OFFSET;
}
uint64_t plat_get_syscnt_freq(void)
{
uint64_t counter_base_frequency;
/* Read the frequency from Frequency modes table */
counter_base_frequency = mmio_read_32(SYS_CNTCTL_BASE + CNTFID_OFF);
/* The first entry of the frequency modes table must not be 0 */
assert(counter_base_frequency != 0);
return counter_base_frequency;
}
void plat_report_exception(void){
serial_puts("Enter exception!\nValue: 0x");
serial_put_hex(read_esr_el1(), 32);
serial_puts("\n");
reset_system();
/*never return*/
while (1) ;
}
|