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* riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callbackChanho Park2023-08-22
* common: return type board_get_usable_ram_topHeinrich Schuchardt2023-08-15
* riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USEShengyu Qu2023-08-10
* riscv: Add SPL_ZERO_MEM_BEFORE_USE implementationShengyu Qu2023-08-10
* riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USEShengyu Qu2023-08-10
* riscv: starfive: Add SYS_CACHE_SHIFT_6 to enable SYS_CACHELINE_SIZEMinda Chen2023-08-10
* riscv: dts: starfive: Enable pcie0 dts nodeMinda Chen2023-08-10
* cmd/sbi: display new extensionsHeinrich Schuchardt2023-08-10
* acpi: Add missing RISC-V acpi_table headerHeinrich Schuchardt2023-08-02
* riscv: dts: starfive: Enable PCIe host controllerMason Huo2023-08-02
* riscv: define a cache line size for the generic CPUHeinrich Schuchardt2023-07-24
* riscv: dts: jh7110: Add clock source from PLLXingyu Wu2023-07-24
* riscv: dts: jh7110: Add PLL clock controller nodeXingyu Wu2023-07-24
* riscv: setup per-hart stack earlierBo Gan2023-07-24
* riscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A boardYixun Lan2023-07-12
* riscv: t-head: licheepi4a: initial support addedYixun Lan2023-07-12
* riscv: Rename SiFive CLINT to RISC-V ALINTBin Meng2023-07-12
* riscv: clint: Update the sifive clint ipi driver to support aclintBin Meng2023-07-12
* ram: starfive: Read memory size information from EEPROMYanhong Wang2023-07-12
* riscv: dts: starfive: Add support eeprom device tree nodeYanhong Wang2023-07-12
* eeprom: starfive: Enable ID EEPROM configurationYanhong Wang2023-07-12
* riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3BYanhong Wang2023-07-12
* riscv: dts: jh7110: Add ethernet device tree nodesYanhong Wang2023-07-12
* riscv: andes_plicsw: Fix IPI during OpenSBI invocationYu Chien Peter Lin2023-07-06
* riscv: dts: sync mpfs-icicle devicetree with linuxConor Dooley2023-07-06
* riscv: dts: drop microchip from dts filenamesConor Dooley2023-07-06
* riscv: define test_and_{set,clear}_bit in asm/bitops.hBen Dooks2023-07-06
* riscv: implement local_irq_{save,restore} macrosBen Dooks2023-07-06
* riscv: add generic link for <asm/atomic.h>Ben Dooks2023-07-06
* cmd/sbi: display new extensionsHeinrich Schuchardt2023-07-06
* Merge tag 'v2023.07-rc6' into nextTom Rini2023-07-05
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| * riscv: Fix alignment of RELA sections in the linker scriptsBin Meng2023-06-27
* | common: spl: Add spl NVMe boot supportMayuresh Chitale2023-06-19
* | Merge tag v2023.07-rc4 into nextTom Rini2023-06-12
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| * dm: Emit the arch_cpu_init_dm() even only before relocationSimon Glass2023-05-11
* | include: Remove unused header filesTom Rini2023-05-31
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* riscv: Support CONFIG_REMAKE_ELFSamuel Holland2023-04-20
* riscv: Update alignment for some sections in linker scriptsBin Meng2023-04-20
* riscv: spl: Remove relocation sectionsBin Meng2023-04-20
* riscv: Avoid updating the link registerBin Meng2023-04-20
* riscv: Change to use positive offset to access relocation entriesBin Meng2023-04-20
* riscv: Optimize loading relocation typeBin Meng2023-04-20
* riscv: Optimize source end address calculation in start.SBin Meng2023-04-20
* riscv: Enforce DWARF4 outputBin Meng2023-04-20
* riscv: Correct a comment in io.hBin Meng2023-04-20
* riscv: dts: jh7110: Add initial StarFive VisionFive v2 board device treeYanhong Wang2023-04-20
* riscv: dts: jh7110: Add initial u-boot device treeYanhong Wang2023-04-20
* riscv: dts: jh7110: Add initial StarFive JH7110 device treeYanhong Wang2023-04-20
* board: starfive: Add TARGET_STARFIVE_VISIONFIVE2 to KconfigYanhong Wang2023-04-20
* riscv: cpu: jh7110: Add Kconfig for StarFive JH7110 SoCYanhong Wang2023-04-20