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path: root/drivers/clk/renesas
Commit message (Expand)AuthorAge
* clk: renesas: Tear clock controller down last before booting OSMarek Vasut2023-08-13
* clk: renesas: add R906G032 driverRalph Siemsen2023-05-13
* clk: renesas: prepare for non R-Car clock driversRalph Siemsen2023-05-13
* clk: renesas: Add R8A779G0 V4H clock tablesHai Pham2023-04-07
* clk: renesas: Add R8A779F0 S4 clock tablesHai Pham2023-04-07
* clk: renesas: Update R-Car Gen3 driver Gen4 supportMarek Vasut2023-04-07
* Merge branch 'master' into nextTom Rini2023-03-27
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| * clk: renesas: Pack reset identifier before look upMarek Vasut2023-03-20
* | clk: renesas: rcar-gen3: Replace SSCG caching with MDSEL/PE cachingMarek Vasut2023-03-18
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* clk: renesas: Always select DM_RESET to prevent inobvious failure of rst_gen3...Marek Vasut2023-03-10
* clk: renesas: rcar-gen3: Factor out CPG libraryHai Pham2023-02-02
* clk: renesas: Add R8A77970 SD0H/SD0 clocks for SDHIHai Pham2023-02-02
* clk: renesas: Switch to new SD clock handlingHai Pham2023-02-02
* clk: renesas: Handle E3/D3 RPCSRC clockHai Pham2023-02-02
* clk: renesas: Introduce and use rcar_clk_get_rate64_div_table functionHai Pham2023-02-02
* clk: renesas: Convert Gen2/Gen3 clock tables to clk-provider struct clk_div_t...Marek Vasut2023-02-02
* clk: renesas: Drop core param from gen3_clk_get_rate64_pll_mul_regMarek Vasut2023-02-02
* clk: renesas: Use pre-defined offset for RPC clocksHai Pham2023-02-02
* clk: renesas: Add and enable CPG reset driverMarek Vasut2023-02-02
* clk: renesas: r8a7796: Add R8A77961 CPG/MSSR supportHai Pham2023-02-02
* clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960Hai Pham2023-02-02
* clk: renesas: Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.1.7Marek Vasut2023-02-02
* clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.1.7Marek Vasut2023-02-02
* clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.1.7Marek Vasut2023-02-02
* clk: renesas: Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.1.7Marek Vasut2023-02-02
* clk: renesas: Synchronize R8A779A0 V3U clock tables with Linux 6.1.7Marek Vasut2023-02-02
* clk: renesas: Synchronize R8A77995 D3 clock tables with Linux 6.1.7Marek Vasut2023-02-02
* clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.1.7Marek Vasut2023-02-02
* clk: renesas: Synchronize R8A77980 V3H clock tables with Linux 6.1.7Marek Vasut2023-02-02
* clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.1.7Marek Vasut2023-02-02
* clk: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ clock tables with ...Marek Vasut2023-02-02
* clk: renesas: Synchronize R8A7795 H3 clock tables with Linux 6.1.7Marek Vasut2023-02-02
* clk: renesas: Add dummy SDnH clockHai Pham2023-02-02
* treewide: invaild -> invalidSean Anderson2022-01-13
* clk: renesas: Add R8A779A0 clock tablesHai Pham2021-06-24
* clk: renesas: Handle R8A779A0 V3U clock types in Gen3 clock codeMarek Vasut2021-06-24
* clk: renesas: Deduplicate gen3_clk_get_rate64() PLL handlingMarek Vasut2021-05-21
* clk: renesas: Add register pointers into struct cpg_mssr_infoHai Pham2021-05-21
* clk: renesas: Introduce enum clk_reg_layoutHai Pham2021-05-21
* clk: renesas: Pass struct cpg_mssr_info to renesas_clk_endisable()Hai Pham2021-05-21
* clk: renesas: Make reset controller modemr register offset configurableMarek Vasut2021-05-21
* clk: renesas: Add support for RPCD2 clockHai Pham2021-05-21
* clk: renesas: Fix Realtime Module Stop Control Register offsetsHai Pham2021-05-21
* clk: renesas: Fix incorrect return RPC clk_get_rateHai Pham2021-05-21
* clk: renesas: Reinstate RPC clock on R-Car D3/E3Marek Vasut2021-05-21
* clk: renesas: Synchronize R-Car Gen3 tables with Linux 5.12Marek Vasut2021-05-21
* clk: renesas: Synchronize R-Car Gen2 tables with Linux 5.12Marek Vasut2021-05-21
* clk: renesas: Synchronize RZ/G2 tables with Linux 5.12Marek Vasut2021-05-21
* clk: renesas: Synchronize Gen2 MSTP teardown tablesMarek Vasut2021-04-25
* clk: renesas: Only ever access documented bits in clock driver teardownMarek Vasut2021-04-25