blob: f923a14301403ef2bbcd169f5d5eddc6c4dbe453 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
|
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) 2022
* Author(s): Jesse Taube <Mr.Bossman075@gmail.com>
* Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
/ {
chosen {
bootph-pre-ram;
};
clocks {
bootph-pre-ram;
};
soc {
bootph-pre-ram;
};
};
&osc {
bootph-pre-ram;
};
&rcosc16M {
bootph-pre-ram;
};
&osc32k {
bootph-pre-ram;
};
&clks {
bootph-pre-ram;
};
&gpio1 {
bootph-pre-ram;
};
&gpio2 {
bootph-pre-ram;
};
&gpio3 {
bootph-pre-ram;
};
&gpio4 {
bootph-pre-ram;
};
&gpio5 {
bootph-pre-ram;
};
&gpt1 {
bootph-pre-ram;
};
&lpuart1 { /* console */
bootph-pre-ram;
};
&semc {
bootph-pre-ram;
bank1: bank@0 {
bootph-pre-ram;
};
};
&iomuxc {
bootph-pre-ram;
imxrt1170-evk {
bootph-pre-ram;
pinctrl_lpuart1: lpuart1grp {
bootph-pre-ram;
};
pinctrl_usdhc0: usdhc0grp {
bootph-pre-ram;
};
pinctrl_semc: semcgrp {
bootph-pre-ram;
};
};
};
&usdhc1 {
bootph-pre-ram;
};
|