blob: 9ddb346dc962cd3fa3e27b4d4c86ada0476e6259 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* (C) Copyright 2012
* Texas Instruments, <www.ti.com>
*/
#ifndef _ASM_ARCH_SPL_H_
#define _ASM_ARCH_SPL_H_
#define BOOT_DEVICE_NONE 0x00
#define BOOT_DEVICE_MMC2_2 0xFF
#if defined(CONFIG_AM33XX)
#define BOOT_DEVICE_XIP 0x01
#define BOOT_DEVICE_XIPWAIT 0x02
#define BOOT_DEVICE_NAND 0x05
#define BOOT_DEVICE_NAND_I2C 0x06
#define BOOT_DEVICE_MMC1 0x08
#define BOOT_DEVICE_MMC2 0x09
#define BOOT_DEVICE_SPI 0x0B
#define BOOT_DEVICE_UART 0x41
#define BOOT_DEVICE_USBETH 0x44
#define BOOT_DEVICE_CPGMAC 0x46
#define BOOT_DEVICE_ONENAND 0xFF /* ROM does not support OneNAND. */
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
#elif defined(CONFIG_AM43XX)
#define BOOT_DEVICE_NOR 0x01
#define BOOT_DEVICE_NAND 0x05
#define BOOT_DEVICE_MMC1 0x07
#define BOOT_DEVICE_MMC2 0x08
#define BOOT_DEVICE_SPI 0x0A
#define BOOT_DEVICE_USB 0x0D
#define BOOT_DEVICE_UART 0x41
#define BOOT_DEVICE_USBETH 0x45
#define BOOT_DEVICE_CPGMAC 0x47
#define MMC_BOOT_DEVICES_START BOOT_DEVICE_MMC1
#ifdef CONFIG_SPL_USB_STORAGE
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_USB
#else
#define MMC_BOOT_DEVICES_END BOOT_DEVICE_MMC2
#endif
#endif
#endif
|