blob: 0b4629f1c8a777c05d7b499c07b35f1ad6b26a78 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
|
// SPDX-License-Identifier: GPL-2.0+
/*
* PPC-specific information for the 'bd' command
*
* (C) Copyright 2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
#include <common.h>
#include <init.h>
#include <asm/global_data.h>
DECLARE_GLOBAL_DATA_PTR;
int arch_setup_bdinfo(void)
{
struct bd_info *bd = gd->bd;
bd->bi_mbar_base = CFG_SYS_MBAR; /* base of internal registers */
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
if (IS_ENABLED(CONFIG_PCI))
bd->bi_pcifreq = gd->pci_clk;
#if defined(CONFIG_EXTRA_CLOCK)
bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
#endif
return 0;
}
void arch_print_bdinfo(void)
{
struct bd_info *bd = gd->bd;
bdinfo_print_mhz("busfreq", bd->bi_busfreq);
#if defined(CFG_SYS_MBAR)
bdinfo_print_num_l("mbar", bd->bi_mbar_base);
#endif
bdinfo_print_mhz("cpufreq", bd->bi_intfreq);
if (IS_ENABLED(CONFIG_PCI))
bdinfo_print_mhz("pcifreq", bd->bi_pcifreq);
#ifdef CONFIG_EXTRA_CLOCK
bdinfo_print_mhz("flbfreq", bd->bi_flbfreq);
bdinfo_print_mhz("inpfreq", bd->bi_inpfreq);
bdinfo_print_mhz("vcofreq", bd->bi_vcofreq);
#endif
}
|