~funderscore blog cgit wiki get in touch
aboutsummaryrefslogtreecommitdiff
blob: a241568f603f8c862cfa49c8160f74ef7207076b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
/* SPDX-License-Identifier: GPL-2.0+ */
/*
 * Copyright (C) 2016 Cadence Design Systems Inc.
 */

#ifndef _XTENSA_SYSTEM_H
#define _XTENSA_SYSTEM_H

#include <asm/arch/core.h>

#if XCHAL_HAVE_INTERRUPTS
#define local_irq_save(flags) \
	__asm__ __volatile__ ("rsil %0, %1" \
			      : "=a"(flags) \
			      : "I"(XCHAL_EXCM_LEVEL) \
			      : "memory")
#define local_irq_restore(flags) \
	__asm__ __volatile__ ("wsr %0, ps\n\t" \
			      "rsync" \
			      :: "a"(flags) : "memory")
#else
#define local_irq_save(flags) ((void)(flags))
#define local_irq_restore(flags) ((void)(flags))
#endif

#endif