board/freescale/t102xrdb/t1023_sd_rcw.cfg


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#PBL preamble and RCW header for T1023RDB
aa55aa55 010e0100
#SerDes Protocol: 0x77
#Default Core=1200MHz, DDR=1600MT/s with single source clock
0810000c 00000000 00000000 00000000
3b800003 00000012 68104000 21000000
00000000 00000000 00000000 00022800
00000130 04020200 00000000 00000006