board/freescale/t102xrdb/t1024_spi_rcw.cfg


1
2
3
4
5
6
7
8

#PBL preamble and RCW header for T1024RDB
aa55aa55 010e0100
#SerDes Protocol: 0x95
#Core/DDR: 1400Mhz/1600MT/s with single source clock
0810000c 00000000 00000000 00000000
4a800003 80000012 5c027000 21000000
00000000 00000000 00000000 00030810
00000000 0b005a08 00000000 00000006