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// SPDX-License-Identifier: GPL-2.0+
/*
* Board specific initialization for AM62x platforms
*
* Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
* Suman Anna <s-anna@ti.com>
*
*/
#include <env.h>
#include <spl.h>
#include <init.h>
#include <video.h>
#include <splash.h>
#include <cpu_func.h>
#include <k3-ddrss.h>
#include <fdt_support.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#include <dm/uclass.h>
DECLARE_GLOBAL_DATA_PTR;
#if CONFIG_IS_ENABLED(SPLASH_SCREEN)
static struct splash_location default_splash_locations[] = {
{
.name = "sf",
.storage = SPLASH_STORAGE_SF,
.flags = SPLASH_STORAGE_RAW,
.offset = 0x700000,
},
{
.name = "mmc",
.storage = SPLASH_STORAGE_MMC,
.flags = SPLASH_STORAGE_FS,
.devpart = "1:1",
},
};
int splash_screen_prepare(void)
{
return splash_source_load(default_splash_locations,
ARRAY_SIZE(default_splash_locations));
}
#endif
int board_init(void)
{
return 0;
}
int dram_init(void)
{
return fdtdec_setup_mem_size_base();
}
int dram_init_banksize(void)
{
return fdtdec_setup_memory_banksize();
}
#if defined(CONFIG_SPL_BUILD)
static int video_setup(void)
{
if (CONFIG_IS_ENABLED(VIDEO)) {
ulong addr;
int ret;
addr = gd->relocaddr;
ret = video_reserve(&addr);
if (ret)
return ret;
debug("Reserving %luk for video at: %08lx\n",
((unsigned long)gd->relocaddr - addr) >> 10, addr);
gd->relocaddr = addr;
}
return 0;
}
void spl_board_init(void)
{
video_setup();
enable_caches();
if (IS_ENABLED(CONFIG_SPL_SPLASH_SCREEN) && IS_ENABLED(CONFIG_SPL_BMP))
splash_display();
}
#if defined(CONFIG_K3_AM64_DDRSS)
static void fixup_ddr_driver_for_ecc(struct spl_image_info *spl_image)
{
struct udevice *dev;
int ret;
dram_init_banksize();
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
panic("Cannot get RAM device for ddr size fixup: %d\n", ret);
ret = k3_ddrss_ddr_fdt_fixup(dev, spl_image->fdt_addr, gd->bd);
if (ret)
printf("Error fixing up ddr node for ECC use! %d\n", ret);
}
#else
static void fixup_memory_node(struct spl_image_info *spl_image)
{
u64 start[CONFIG_NR_DRAM_BANKS];
u64 size[CONFIG_NR_DRAM_BANKS];
int bank;
int ret;
dram_init();
dram_init_banksize();
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
start[bank] = gd->bd->bi_dram[bank].start;
size[bank] = gd->bd->bi_dram[bank].size;
}
/* dram_init functions use SPL fdt, and we must fixup u-boot fdt */
ret = fdt_fixup_memory_banks(spl_image->fdt_addr, start, size,
CONFIG_NR_DRAM_BANKS);
if (ret)
printf("Error fixing up memory node! %d\n", ret);
}
#endif
void spl_perform_fixups(struct spl_image_info *spl_image)
{
#if defined(CONFIG_K3_AM64_DDRSS)
fixup_ddr_driver_for_ecc(spl_image);
#else
fixup_memory_node(spl_image);
#endif
}
#endif
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