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Xilinx Zynq QSPI controller Device Tree Bindings
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Required properties:
- compatible : Should be "xlnx,zynq-qspi-1.0".
- reg : Physical base address and size of QSPI registers map.
- interrupts : Property with a value describing the interrupt
number.
- interrupt-parent : Must be core interrupt controller
- clock-names : List of input clock names - "ref_clk", "pclk"
(See clock bindings for details).
- clocks : Clock phandles (see clock bindings for details).
Optional properties:
- num-cs : Number of chip selects used.
Example:
qspi@e000d000 {
compatible = "xlnx,zynq-qspi-1.0";
clock-names = "ref_clk", "pclk";
clocks = <&clkc 10>, <&clkc 43>;
interrupt-parent = <&intc>;
interrupts = <0 19 4>;
num-cs = <1>;
reg = <0xe000d000 0x1000>;
} ;
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