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Commit message (
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Author
Age
*
riscv: Rename SiFive CLINT to RISC-V ALINT
Bin Meng
2023-07-12
*
riscv: global_data.h: Correct the comment for PLICSW
Yu Chien Peter Lin
2023-02-17
*
riscv: Rename Andes PLIC to PLICSW
Yu Chien Peter Lin
2022-11-03
*
riscv: Introduce AVAILABLE_HARTS
Rick Chen
2022-09-26
*
spl: introduce SPL_XIP to config
Nikita Shubin
2022-09-26
*
riscv: Split SiFive CLINT support between SPL and U-Boot proper
Bin Meng
2021-05-17
*
riscv: Rework Andes PLMT as a UCLASS_TIMER driver
Sean Anderson
2020-09-30
*
riscv: define function set_gd()
Heinrich Schuchardt
2020-09-14
*
riscv: Add headers for asm/global_data.h
Sean Anderson
2020-07-01
*
riscv: Provide a mechanism to fix DT for reserved memory
Atish Patra
2020-04-23
*
riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL
Bin Meng
2020-04-23
*
riscv: Introduce CONFIG_XIP to support booting from flash
Rick Chen
2019-05-09
*
riscv: Add a SYSCON driver for Andestech's PLMT
Rick Chen
2019-04-08
*
riscv: Add a SYSCON driver for Andestech's PLIC
Rick Chen
2019-04-08
*
riscv: add infrastructure for calling functions on other harts
Lukas Auer
2019-04-08
*
riscv: Save boot hart id to the global data
Bin Meng
2018-12-18
*
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
Bin Meng
2018-12-18
*
SPDX: Convert all of our single license tags to Linux Kernel style
Tom Rini
2018-05-07
*
riscv: checkpatch: Fix use of volatile
Rick Chen
2018-03-30
*
riscv: nx25: include: Add header files to support RISC-V
Rick Chen
2018-01-12