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Commit message (
Expand
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Author
Age
*
riscv: Rename SiFive CLINT to RISC-V ALINT
Bin Meng
2023-07-12
*
riscv: clint: Update the sifive clint ipi driver to support aclint
Bin Meng
2023-07-12
*
riscv: andes_plicsw: Fix IPI during OpenSBI invocation
Yu Chien Peter Lin
2023-07-06
*
riscv: semihosting: replace inline assembly with assembly file
Andre Przywara
2023-03-06
*
Correct SPL uses of LMB
Simon Glass
2023-02-10
*
riscv: memcpy: check src and dst before copy
Rick Chen
2023-02-01
*
efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE
Heinrich Schuchardt
2022-12-29
*
arch/riscv: add semihosting support for RISC-V
Kautuk Consul
2022-12-08
*
riscv: Rename Andes PLIC to PLICSW
Yu Chien Peter Lin
2022-11-03
*
riscv: andes_plic.c: use modified IPI scheme
Yu Chien Peter Lin
2022-10-20
*
dm: core: Drop ofnode_is_available()
Simon Glass
2022-09-29
*
treewide: Drop bootm_headers_t typedef
Simon Glass
2022-09-29
*
riscv: Introduce AVAILABLE_HARTS
Rick Chen
2022-09-26
*
spl: introduce SPL_XIP to config
Nikita Shubin
2022-09-26
*
zynqmp: Run board_get_usable_ram_top() only on main U-Boot
Ashok Reddy Soma
2022-07-26
*
arm: riscv: Remove additional ifdef from code guarded by CONFIG_IS_ENABLED
Michal Simek
2022-07-26
*
riscv: provide missing base extension functions
Heinrich Schuchardt
2022-04-06
*
event: Convert arch_cpu_init_dm() to use events
Simon Glass
2022-03-10
*
efi_loader: fix SectionAlignment, FileAlignment
Heinrich Schuchardt
2022-01-15
*
riscv: revert Complete efi header for RV32/64
Heinrich Schuchardt
2022-01-15
*
riscv: function to retrieve SBI implementation version
Heinrich Schuchardt
2021-11-08
*
fdtdec: Support reserved-memory flags
Thierry Reding
2021-10-13
*
fdtdec: Support compatible string list for reserved memory
Thierry Reding
2021-10-13
*
image: Drop IMAGE_ENABLE_OF_LIBFDT
Simon Glass
2021-10-08
*
sysreset: provide SBI based sysreset driver
Heinrich Schuchardt
2021-10-07
*
riscv: Fix setting no-map in reserved memory nodes
Samuel Holland
2021-10-07
*
lmb: riscv: Add arch_lmb_reserve()
Marek Vasut
2021-09-23
*
riscv: lib: implement enable_caches for sifive cache
Zong Li
2021-09-07
*
common: board_r: support enable_caches for RISC-V
Zong Li
2021-09-07
*
riscv: show code leading to exception
Heinrich Schuchardt
2021-09-07
*
efi_loader: add Linux magic to RISC-V crt0
Heinrich Schuchardt
2021-08-14
*
riscv: booti: do not force relocation if force_reloc is not set
Vitaly Wool
2021-07-21
*
riscv: andes_plic: Fix riscv_get_ipi() mask
Bin Meng
2021-06-17
*
riscv: Drop USE_SPL_FIT_GENERATOR
Bin Meng
2021-05-19
*
riscv: Fix memmove and optimise memcpy when misalign
Bin Meng
2021-05-17
*
riscv: Fix arch_fixup_fdt always failing without /chosen
Sean Anderson
2021-05-17
*
riscv: Split SiFive CLINT support between SPL and U-Boot proper
Bin Meng
2021-05-17
*
Add support for stack-protector
Joel Peshkin
2021-04-20
*
riscv: assembler versions of memcpy, memmove, memset
Heinrich Schuchardt
2021-04-08
*
riscv: simplify longjmp
Heinrich Schuchardt
2021-04-08
*
common: Drop asm/global_data.h from common header
Simon Glass
2021-02-02
*
Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next
Tom Rini
2021-01-05
|
\
|
*
dm: Rename DM_GET_DRIVER() to DM_DRIVER_GET()
Simon Glass
2021-01-05
*
|
riscv: Complete efi header for RV32/64
Leo Yu-Chi Liang
2020-12-14
*
|
riscv: Fix efi header size for RV32
Leo Yu-Chi Liang
2020-12-14
*
|
riscv: Fix efi header for RV32
Atish Patra
2020-12-14
*
|
riscv: reset after crash
Heinrich Schuchardt
2020-12-14
|
/
*
riscv: Move timer portions of SiFive CLINT to drivers/timer
Sean Anderson
2020-10-26
*
riscv: Move Andes PLMT driver to drivers/timer
Sean Anderson
2020-10-26
*
timer: Return count from timer_ops.get_count
Sean Anderson
2020-10-22
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