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* riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callbackChanho Park2023-08-22
* dm: Emit the arch_cpu_init_dm() even only before relocationSimon Glass2023-05-11
* riscv: cpu: check U-Mode before counteren writeNikita Shubin2023-02-01
* riscv: Fix detecting FPU support in standard extensionYu Chien Peter Lin2022-11-15
* riscv: Introduce AVAILABLE_HARTSRick Chen2022-09-26
* spl: introduce SPL_XIP to configNikita Shubin2022-09-26
* event: Convert arch_cpu_init_dm() to use eventsSimon Glass2022-03-10
* riscv: Remove OF_PRIOR_STAGE from RISC-V boardsIlias Apalodimas2021-10-18
* sysreset: provide SBI based sysreset driverHeinrich Schuchardt2021-10-07
* treewide: Convert macro and uses of __section(foo) to __section("foo")Marek BehĂșn2021-05-24
* riscv: cpu: Add callback to init each coreGreen Wan2021-05-05
* riscv: Clear pending IPIs on initializationSean Anderson2020-09-30
* riscv: Make SiFive HiFive Unleashed board boot againBin Meng2020-07-24
* riscv: Add option to support RISC-V privileged spec 1.9Sean Anderson2020-07-01
* riscv: Clean up IPI initialization codeSean Anderson2020-07-01
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-18
* common: Drop init.h from common headerSimon Glass2020-05-18
* riscv: add run mode configuration for SPLLukas Auer2019-08-26
* riscv: Access CSRs using CSR numbersBin Meng2019-08-15
* riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is ena...Rick Chen2019-05-09
* riscv: Introduce CONFIG_XIP to support booting from flashRick Chen2019-05-09
* riscv: add support for multi-hart systemsLukas Auer2019-04-08
* riscv: Do some basic architecture level cpu initializationBin Meng2018-12-18
* riscv: Update supports_extension() to use desc from cpu driverBin Meng2018-12-18
* riscv: Remove non-DM version of print_cpuinfo()Bin Meng2018-12-18
* riscv: Probe cpus during bootBin Meng2018-12-18
* riscv: save hart ID and device tree passed by prior boot stageLukas Auer2018-11-26
* riscv: Add a helper routine to print CPU informationBin Meng2018-10-03