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path: root/arch/riscv/cpu/generic
Commit message (Expand)AuthorAge
* common: return type board_get_usable_ram_topHeinrich Schuchardt2023-08-15
* riscv: define a cache line size for the generic CPUHeinrich Schuchardt2023-07-24
* riscv: Rename SiFive CLINT to RISC-V ALINTBin Meng2023-07-12
* board_f: Fix types for board_get_usable_ram_top()Pali Rohár2022-09-23
* riscv: qemu: Switch to use binman to generate u-boot.itbBin Meng2021-05-19
* riscv: Split SiFive CLINT support between SPL and U-Boot properBin Meng2021-05-17
* cpu: Rename SPL_CPU_SUPPORT to SPL_CPUSimon Glass2021-03-27
* Merge branch '2021-02-02-drop-asm_global_data-when-unused'Tom Rini2021-02-15
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| * common: Drop asm/global_data.h from common headerSimon Glass2021-02-02
* | riscv: Adjust board_get_usable_ram_top() for 32-bitBin Meng2021-02-03
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* riscv: Rework riscv timer driver to only support S-modeSean Anderson2020-09-30
* common: Drop net.h from common headerSimon Glass2020-05-18
* riscv: qemu: Remove the simple-bus driver for the SoC nodeBin Meng2020-04-23
* common: Move board_get_usable_ram_top() out of common.hSimon Glass2019-12-02
* common: Move enable/disable_interrupts out of common.hSimon Glass2019-12-02
* riscv: add SPL supportLukas Auer2019-08-26
* riscv: add run mode configuration for SPLLukas Auer2019-08-26
* riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systemsAnup Patel2019-02-27
* riscv: Rename cpu/qemu to cpu/genericAnup Patel2019-02-27