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path: root/arch/riscv/cpu/start.S
Commit message (Expand)AuthorAge
* riscv: Add SPL_ZERO_MEM_BEFORE_USE implementationShengyu Qu2023-08-10
* riscv: setup per-hart stack earlierBo Gan2023-07-24
* riscv: spl: Remove relocation sectionsBin Meng2023-04-20
* riscv: Avoid updating the link registerBin Meng2023-04-20
* riscv: Change to use positive offset to access relocation entriesBin Meng2023-04-20
* riscv: Optimize loading relocation typeBin Meng2023-04-20
* riscv: Optimize source end address calculation in start.SBin Meng2023-04-20
* riscv: Introduce AVAILABLE_HARTSRick Chen2022-09-26
* spl: introduce SPL_XIP to configNikita Shubin2022-09-26
* riscv: ae350: Fix XIP config boot failureLeo Yu-Chi Liang2022-08-11
* riscv: cpu: set gp before board_init_f_init_reserveNikita Shubin2022-08-11
* Migrate CUSTOM_SYS_INIT_SP_ADDR to Kconfig using system-constants.hTom Rini2022-06-06
* riscv: Remove OF_PRIOR_STAGE from RISC-V boardsIlias Apalodimas2021-10-18
* riscv: cpu: Add callback to init each coreGreen Wan2021-05-05
* riscv: fix the wrong swap value registerBrad Kim2020-12-14
* riscv: Add some comments to start.SSean Anderson2020-09-30
* riscv: Ensure gp is NULL or points to valid dataSean Anderson2020-09-30
* riscv: Consolidate fences into AMOs for available_harts_lockSean Anderson2020-09-30
* Revert "riscv: Clear pending interrupts before enabling IPIs"Sean Anderson2020-09-30
* riscv: Fix linking error when building u-boot-spl with no SMP supportLeo Yu-Chi Liang2020-07-24
* riscv: Clear pending interrupts before enabling IPIsSean Anderson2020-07-01
* riscv: Provide a mechanism to fix DT for reserved memoryAtish Patra2020-04-23
* riscv: Introduce SPL_SMP Kconfig option for U-Boot SPLBin Meng2020-04-23
* riscv: Merge unnecessary SMP ifdefs in start.SBin Meng2020-04-23
* riscv: Remove unnecessary instructionSean Anderson2020-02-10
* common: Move relocate_code() to init.hSimon Glass2020-01-17
* riscv: add option to wait for ack from secondary harts in smp functionsLukas Auer2019-12-10
* riscv: Fix clear bss loop in the start-up codeRick Chen2019-12-10
* riscv: update fix_rela_dynMarcus Comstedt2019-09-03
* riscv: support SPL stack and global data relocationLukas Auer2019-08-26
* riscv: add SPL supportLukas Auer2019-08-26
* riscv: add run mode configuration for SPLLukas Auer2019-08-26
* riscv: Access CSRs using CSR numbersBin Meng2019-08-15
* riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is ena...Rick Chen2019-05-09
* riscv: Introduce CONFIG_XIP to support booting from flashRick Chen2019-05-09
* riscv: hang if relocation of secondary harts failsLukas Auer2019-04-08
* riscv: do not rely on hart ID passed by previous boot stageLukas Auer2019-04-08
* riscv: add support for multi-hart systemsLukas Auer2019-04-08
* riscv: save hart ID in register tp instead of s0Lukas Auer2019-04-08
* riscv: delay initialization of caches and debug UARTLukas Auer2019-04-08
* riscv: Save boot hart id to the global dataBin Meng2018-12-18
* riscv: Move trap handler codes to mtrap.SBin Meng2018-12-18
* riscv: ax25-ae350: Pass dtb address to u-boot with a1 registerRick Chen2018-12-05
* riscv: Add kconfig option to run U-Boot in S-modeAnup Patel2018-12-05
* riscv: cache: Implement i/dcache [status, enable, disable]Rick Chen2018-11-26
* riscv: save hart ID and device tree passed by prior boot stageLukas Auer2018-11-26
* riscv: do not blindly modify the mstatus CSRLukas Auer2018-11-26
* riscv: remove unused labels in start.SLukas Auer2018-11-26
* Drop CONFIG_INIT_CRITICALBin Meng2018-11-26
* riscv: align mtvec on a 4-byte boundaryLukas Auer2018-11-26